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Last updated on August 16, 2026. This conference program is tentative and subject to change
Technical Program for Wednesday August 12, 2026
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| WedK5N Keynote Session, Hall of Mirrors |
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| MWSCAS Keynote IV: Dr. Prashant Majhi |
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| Chair: Jha, Rashmi | University of Cincinnati |
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| 08:30-09:15, Paper WedK5N.1 | Add to My Program |
| CMOS Technology Scaling Enabling AI Era (I) |
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| Majhi, Prashant | Intel Corporation |
Keywords: Microelectronics, Enabling Technology for Artificial Intelligence
Abstract: Artificial intelligence demands of exponentially higher computational efficiency and memory bandwidth, are fundamentally enabled by cutting-edge semiconductor technology scaling that combines geometric miniaturization with advanced heterogenous integration. Advanced CMOS technologies have transitioned from FinFETs to Gate-all-around (GAA) transistors combined with backside power delivery. While GAA offers improved gate control and scalability, limited future scaling of contacted poly pitch (CPP) is driving the industry to shift focus to vertical scaling and associated interconnect innovations. Looking forward, transistor stacking, particularly complementary FET (CFET) architectures, promises to extend Moore’s law by increasing density without shrinking lateral dimensions. Multiple integration flows, including monolithic, sequential, and wafer bonding, are being explored to realize this vision. This talk will review some of the recent advances in technology scaling and highlight challenges and opportunities for future nodes, focusing on novel materials and device architecture that are increasingly complemented by design-technology co-optimization (DTCO) boosters, as Moore’s Law shifts toward System-Technology Co-Optimization (STCO).
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| WedAT1 Regular Session, Salon B |
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| AES3: Integrated Photonics |
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| Chair: Sarangan, Andrew | University of Dayton |
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| 09:30-11:00, Paper WedAT1.1 | Add to My Program |
| Reconfigurable Multi-Channel Graphene Microring Modulator for WDM Optical Interconnects |
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| Suri, Ramaa Saket | Purdue University |
| Kumar, Mukesh | Indian Institute of Technology, Indore |
| Rizkalla, Maher E. | Purdue University |
| Lee, John J. | Purdue University |
Keywords: Integrated Photonics
Abstract: The reconfigurable optical interconnects of large-scale AI data centers demand nanosecond-scale wavelength agility while operating within milliwatt power budgets. We present a Hybrid Electro-Optic Tunable Multichannel Modulator (HETM), a four-channel graphene electro-optic silicon-on-insulator (SOI) microring modulator that treats Q-factor variation as a characterized design constraint, achieving 110~ns switching, greater than 4~nm tuning per channel, 50~GHz ITU-T spacing, and less than 10~mW total power.
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| 09:30-11:00, Paper WedAT1.2 | Add to My Program |
| Ferroelectric Behavior of Hafnium Oxide for Integrated Photonic Non-Volatile Memory Devices |
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| Fox, Heidi | University of Dayton |
| Ndao, Abdul | University of Dayton |
| Perera, Asela | University of Dayton |
| Njoka, Sheilah | University of Dayton |
| Thant, Phone Min | University of Dayton |
| Chakravarty, Swapnajit | University of Dayton |
Keywords: Integrated Photonics, Semiconductor Devices
Abstract: This study evaluates the ferroelectric properties of hafnium oxide (HfO₂) thin films for non-volatile integrated photonic applications. Experimental retention tests confirm stable polarization states across metal-insulator-metal stacks, thereby validating CMOS-compatible hafnium oxide capacitors as robust candidates for in-memory computing and photonic memory
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| WedAT2 Regular Session, Salon M |
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| CAS3: AI/ML: Collaborative/multi-Agent Systems VII |
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| Chair: Bihl, Trevor | Shawnee State University |
| Co-Chair: Koranek, Daniel | Air Force Institute of Technology |
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| 09:30-11:00, Paper WedAT2.1 | Add to My Program |
| From Compute Scaling to Decision Optimization: Neuromorphic Architectures for Sustainable AI Infrastructure |
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| Harbour, Steven | BrainChip, Inc., University of Dayton, MIT Professional Education CTO Program |
| Johnson, Kevin | Arizona State University |
| Silaparasetti, Gnana | MIT Professional Education CTO Program |
| E., Ehren | MIT Professional Education CTO Program |
| Bermudez, Alexander | MIT Professional Education CTO Program |
| Scheitlin, Justin | MIT Professional Education CTO Program |
| Toutam, Pritika | MIT Professional Education CTO Program |
| Bin Hassan, Yasser | MIT Professional Education CTO Program |
| Wilson, Kegan | MIT Professional Education CTO Program |
Keywords: Architecture, Collaborative/Multi-Agent Systems, Enabling Technology for Artificial Intelligence
Abstract: AI scaling trajectories approaching 10˛⁷ joules motivate a shift from brute-force GPU compute toward decision-optimized infrastructure. Building upon prior MIT neuromorphic research, we integrate event-driven computation, State Space Models, adaptive orchestration, utility-optimized routing, and Akida-based neuromorphic inference for LLMs. The resulting heterogeneous compute architecture observes live workload and infrastructure telemetry, predicts the latency, energy, utility, and reliability consequences of alternative execution paths, and routes each request to the lowest-cost feasible compute tier while enforcing operational constraints. This paper formalizes Decision-Optimized Compute Theory (DOCT), introduces a selective execution architecture spanning suppression, neuromorphic inference, and GPU/LLM escalation, and illustrates its application across datacenter, cloud, edge, and ISR environments.
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| 09:30-11:00, Paper WedAT2.2 | Add to My Program |
| A Stateless Reusable Crossbar Accelerator for Neural Network Inference |
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| Papachristou, Christos | Case Western Reserve University |
| Aloufi, Jaber | Case Western Reserve University |
Keywords: Enabling Technology for Artificial Intelligence, Neuromorphic Computing, Digital Engineering
Abstract: This paper presents a stateless reusable digital crossbar accelerator for neural network inference. The crossbar array consists of NxN digital switches, each selectively connecting row column pairs to perform multiply–accumulate (MAC) operations. Unlike conventional designs that require dedicated arrays for each network layer, weights are loaded into a single reusable array before each computation. A conflict-free schedule loads all NxN weights in N steps. The architecture supports four inference cases: matched, where the weight matrix fits into the crossbar; partitioned, where it is larger; multi-layer, where multiple layers reuse the same crossbar sequentially; and combined. A Python simulator validates correctness across all cases and confirms that a single reusable crossbar can replace multiple dedicated arrays through sequential reuse. The cost scales linearly with the number of layers and quadratically with the layer-to-crossbar ratio.This paper presents a stateless reusable digital crossbar accelerator for neural network inference. The crossbar array consists of NxN digital switches, each selectively connecting row column pairs to perform multiply–accumulate (MAC) operations. Unlike conventional designs that require dedicated arrays for each network layer, weights are loaded into a single reusable array before each computation. A conflict-free schedule loads all NxN weights in N steps. The architecture supports four inference cases: matched, where the weight matrix fit
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| WedAT3 Regular Session, Salon C |
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| AES1: Emerging Microelectronics III |
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| Chair: Islam, Ahmad | Air Force Research Laboratory |
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| 09:30-11:00, Paper WedAT3.1 | Add to My Program |
| (Invited) BEACON: Bioelectronics, Edge AI, and Advanced Chip Optimization for the Next Generation |
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| Hussain, Muhammad Mustafa | Purdue University |
Keywords: Microelectronics, Packaging & Integration, Microfabrication
Abstract: Bioelectronics, Edge AI, and advanced heterogeneous integration are converging to transform intelligent electronic systems. This talk presents scalable microsystem technologies integrating flexible electronics, multimodal sensing, embedded intelligence, and advanced packaging to enable autonomous healthcare, human-machine interfaces, and resilient edge computing, bridging fundamental innovation with practical, manufacturable semiconductor solutions.
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| 09:30-11:00, Paper WedAT3.2 | Add to My Program |
| (Invited) Thermal Characterization of Metal Embedded Chip Assembly for Advanced Packaging |
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| Judit, Beagle | Air Force Research Laboratory |
Keywords: Microelectronics, Packaging & Integration
Abstract: This presentation analyzes the thermal performance of Metal Embedded Chip Assembly (MECA) in advanced packaging. Addressing the critical heat dissipation challenges of high-density, heterogeneously integrated microelectronics, we evaluate MECA’s ability to minimize thermal resistance, mitigate hotspots, and significantly enhance overall system reliability and performance for next-generation high power applications.
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| 09:30-11:00, Paper WedAT3.3 | Add to My Program |
| (Invited) Seeing Stress in Scaled through Silicon Vias (TSVs) |
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| Beechem, Thomas | Purdue University |
Keywords: Microfabrication, Packaging & Integration, Microelectronics
Abstract: Through silicon vias (TSVs) enable 3D-architectures but result in stresses that can impact both the performance and reliability of the silicon surrounding them. Here, these TSV-induced stresses are measured using Raman spectroscopy and the increasingly important role of Cu-microstructure identified as these structures scale to nanometric dimensions.
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| WedDL1S Keynote Session, Hall of Mirrors |
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| NAECON IEEE Tri-Society DL Talk-I |
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| Chair: Subramanyam, Guru | University of Dayton |
| Co-Chair: Wolfe, Timothy | Air Force Institute of Technology |
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| 11:15-12:00, Paper WedDL1S.1 | Add to My Program |
| Design and Development of Flat Panel Phased Array Antennas for Wireless and Satellite Communication Applications (I) |
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| Sharma, Satish | San Diego State University |
Keywords: Electronic Warfare and Countermeasures
Abstract: There is growing demand for high throughput beam steering antennas in wireless and satellite communication systems. This talk explores the design and development of flat-panel phased arrays at Ku-, K/Ka-bands that demonstrate active electronic beam steering across varied polarizations. These arrays include integrated beamforming networks (BFNs) that employ commercial BFICs. It also highlights high-data-throughput testing using the developed arrays in the lab (20 m separation), over a 1 km outdoor link, and on a 100,000-ft high-altitude balloon (HAB), and concludes with future directions for advanced beam steering technologies.
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| WedDL2S Keynote Session, Hall of Mirrors |
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| NAECON IEEE Tri-Society DL Talk-II |
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| Chair: Subramanyam, Guru | University of Dayton |
| Co-Chair: Wolfe, Timothy | Air Force Institute of Technology |
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| 12:00-12:45, Paper WedDL2S.1 | Add to My Program |
| MHz to THz Technologies: Addressing Fundamental Science Questions (I) |
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| Chattopadhyay, Goutam | NASA Jet Propulsion Laboratory |
Keywords: Space Exploration, THz Imaging and Sensing
Abstract: Space exploration inspires future generations through discovery and innovation while deepening our understanding of Earth and the universe. This lecture highlights MHz-to-THz technologies enabling next-generation space instruments, their scientific goals, and their role in advancing planetary science, climate studies, and the search for life beyond Earth.
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| WedLL Keynote Session, Pavillion |
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| Naecon Luncheon Iii |
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| Chair: Islam, Ahmad | Air Force Research Laboratory |
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| 13:15-13:45, Paper WedLL.1 | Add to My Program |
| SPARK: Semiconductor Pathways for Aspiration, Resilience, and Knowledge (I) |
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| Hussain, Muhammad Mustafa | Purdue University |
Keywords: Microelectronics, Microfabrication, Semiconductor Devices
Abstract: Every great innovation begins with a spark — an idea, an opportunity, a door that opens to the future. In this talk, I will share how his journey in microelectronics led to the creation of vFabLab (a virtual fabrication lab with thousands of global users), the Mobile Fab (a lab-on-wheels that makes semiconductor learning hands-on and portable), and the Semiconductor 101 series (a foundational entry point for anyone, anywhere, to step into this exciting world). I will also introduce the STARS program (Summer Training on Awareness and Readiness for Semiconductors) READI (Regional Economic Acceleration and Development Initiative), and VICTORS (Veterans Inclusion and Competency Toward Semiconductors) – three groundbreaking initiatives that are expanding the ecosystem of opportunities for learners across the country. Together, these platforms demonstrate how access, curiosity, and persistence can turn today’s learners into tomorrow’s leaders. Students will discover how semiconductors power everything from smartphones to space travel, why they are central to America’s future, and how young innovators can begin their journey now. By exploring real stories of students who turned curiosity into invention, this session will ignite a sense of possibility: that anyone, with the right spark, can lead the next revolution in technology.
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| WedDL3S Keynote Session, Hall of Mirrors |
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| NAECON IEEE Tri-Society DL Talk-III |
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| Chair: Subramanyam, Guru | University of Dayton |
| Co-Chair: Wolfe, Timothy | Air Force Institute of Technology |
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| 13:55-14:40, Paper WedDL3S.1 | Add to My Program |
| How to Stay Alive from DEAD: A Journey through Radar Electronic Warfare (I) |
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| Lo Monte, Lorenzo | TTM Technologies |
Keywords: Electronic Warfare and Countermeasures, UAVs, AESAs
Abstract: In the high-stakes world of DEAD (Destruction of Enemy Air Defense) missions, survival depends on mastering both radar and electronic warfare. Victory belongs to those who understand the enemy’s systems as deeply as their own, because in modern warfare, knowledge is the ultimate weapon.
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| WedBT1 Regular Session, Salon B |
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| M&S: Digital Twin II |
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| Chair: Kebede, Temesgen | Air Force Research Laboratory |
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| 15:00-16:30, Paper WedBT1.1 | Add to My Program |
| Subregion Electrical Impedance Tomography Analysis for Damage Assessment |
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| Blasch, Erik | AFOSR |
| Ngoc Nam Pham, Pham | Brno University of Technology |
| Jan, Leuchter | Brno University of Technology |
Keywords: Simulation-Based Validation and Verification, Hardware-in-the-Loop (HIL) Testing, Digital Twins
Abstract: Recent non-destructive testing (NDT) and structural health monitoring (SHM) groups are considering Electrical Impedance Technology (EIT) to detect variations in the continuity of structures. For example, composite materials in modern aircraft could benefit from EIT-based SHM. One challenge is the best method to combine the sensor information. Senor fusion is proposed in the paper to integrated different sensor data to reduce the variance in the damage localization from sensor integration. Combining all the data for pixel-level fusion is efficient and sometimes cannot be optimally accurate. To enhance the sensor fusion efficiency, this paper proposes a region-based EIT SHM (RES). The simulation results demonstrate that the proposed RES strategy significantly improves the timeliness while maintaining damage detection accuracy. The method presented is expected to enhance the practical feasibility of EIT-based NDT and SHM systems..
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| 15:00-16:30, Paper WedBT1.2 | Add to My Program |
| PyDopplerSim: A Physical-Layer Simulator for Concurrent Transmitter-Receiver Doppler Motion |
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| Delsing, Kaiden | Air Force Institute of Technology |
| Hopkinson, Kenneth | Air Force Institute of Technology |
Keywords: Simulation-Based Validation and Verification
Abstract: Existing RF simulators provide limited support for Doppler-aware modeling of concurrent transmitter–receiver motion. This work introduces PyDopperSim, a simulation framework that generates Doppler-shifted IQ samples for baseband receiver-side reconstruction of transmitter radial dynamics. Experimental scenarios demonstrate accurate radial velocity and acceleration recovery, supporting reproducible RF sensing and localization research.
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| 15:00-16:30, Paper WedBT1.3 | Add to My Program |
| Modeling Humans and Agents in Cyber Security |
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| Reith, Mark | Air Force Institute of Technology |
Keywords: Digital Engineering, Digital Twins, AI for Cognitive Sensing and Data Fusion
Abstract: The past three decades have generated a substantial collection of cyber models that explain or predict cyber related phenomena. Such models have historically included variations of threat modeling that relate attack activities to a target system. Although many of these models help explain relationships between technical concepts, few focus on sociotechnical aspects; moreover, few consider the ways human-agent teaming influence these sociotechnical aspects. Most cyber models tend to marginalize the human element as if it were irrelevant to cyber related phenomena, specifically the cyber professional and systems/software engineer roles. Furthermore, as artificial intelligence increasingly augments some human activities and decision-making, researchers should investigate how this technology might be employed. This paper proposes a Cyber Human Dynamics Model to not only address this gap among technical cyber models, but sets the stage for a deeper conversation about human-agent teaming. The proposed model represents various stakeholders responsibilities, motivations, and decision points, then explains relationships and tradeoffs between these stakeholders. This new perspective is intended to serve in two ways: first as an educational tool that provides context for traditional cyber models to non-cyber professionals, and second as a baseline for examining future human-agent teaming opportunities. The evaluation of the model includes a comparison to existing cyber models.
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| WedBT2 Regular Session, Salon M |
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| CAS1/CAS2/CAS3 Session |
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| Chair: Koranek, Daniel | Air Force Institute of Technology |
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| 15:00-16:30, Paper WedBT2.1 | Add to My Program |
| Optimizing Traffic Using Real-Time Information |
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| Hopkinson-Jain, Nikhil | Carroll High School |
Keywords: Collaborative/Multi-Agent Systems, Simulation-Based Validation and Verification, Software and Networking
Abstract: Apps like Google Maps and Waze use real-time traffic data to optimize driving routes. This article investigates similarly using real-time traffic data to optimize stop lights in order to make travel times faster for city drivers. The goal is to train an artificial intelligence machine learning algorithm to adapt traffic light signal timings in real time to reduce the amount of slowed or stopped traffic. Centralized control and decentralized control policies were trained, and static policies were tested as a control. The experiments in this project were run in the SUMO-RL simulator using a set of sixteen intersections arranged in a four-by-four grid. Both the centralized and decentralized learning agents were run using a Diffusion Convolutional Recurrent Neural Network (DCRNN) spatiotemporal learning algorithm running on PyTorch, a machine learning framework running with Python. The decentralized algorithm ultimately performed the best after training, enabling faster and more efficient traffic flows, when compared to the centralized and static traffic control systems. These results support the hypothesis that the use of real-time traffic data can improve traffic flows by adapting a city’s traffic lights.
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| 15:00-16:30, Paper WedBT2.2 | Add to My Program |
| Loco-Loco-RL: Low Cost Terrain Mapping for Humanoid Locomotion with Reinforcement Learning |
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| Dowdy, Jordan | University of Louisville |
| Reizian, Gryffin | University of Louisville |
| Chagas Vaz, Jean | University of Louisville |
Keywords: Robotics, Enabling Technology for Artificial Intelligence, Distributed Sensor Arrays
Abstract: This paper presents a low-cost terrain-sensing approach for humanoid locomotion using a multi-array time-of-flight sensor in combination with a token-compressed temporal transformer policy. The system fuses proprioception, commands, previous actions, and sparse terrain samples, runs onboard inference on a Jetson Nano, and demonstrates velocity tracking and rough-terrain walking on hardware.
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| 15:00-16:30, Paper WedBT2.3 | Add to My Program |
| Analyzing Structural and Semantic Barriers to Automated Adversary Emulation in Active Directory |
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| Ding, Anita | AFIT |
| Rose, Anthony | AFIT |
| Reith, Mark | AFIT |
Keywords: Software and Networking, Collaborative/Multi-Agent Systems, Enabling Technology for Artificial Intelligence
Abstract: Active Directory (AD) underpins enterprise identity management and is among the most heavily targeted assets in modern enterprise networks. When red teams emulate attackers targeting it, they typically chain BloodHound for relationship mapping, Impacket for protocol manipulation, and Responder for credential interception. Despite rapid advances in Large Language Models (LLMs), reliably automating this BIR workflow is still difficult, and the difficulty is not primarily one of reasoning. We analyze three sources of integration friction that block automation. The first is data dependency and contextual fragility, the second is temporal and procedural synchronization, and the third is semantic and operational inconsistency. We propose three architectural responses. They are tool wrappers, sidecar validators, and a shared Blackboard. Throughout, we carefully separate what we validate from what we propose. We empirically evaluate the sidecar pattern across four failure modes (N=80). The wrapper and Blackboard layers are presented as architecture whose end-to-end validation remains future work. For the sidecar, deterministic pre-validation lets code, rather than the LLM, route around connectivity failures, with equivalent latency and only a modest token overhead in the structured output. The same experiment serves as a component-level ablation. It contrasts workflow behavior with and without the sidecar, converting ambiguous tool errors into structured, actionable directives.
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| WedBT3 Regular Session, Salon C |
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| AES1: Emerging Microelectronics IV |
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| Chair: Beechem, Thomas | Purdue University |
| Co-Chair: Judit, Beagle | Air Force Research Laboratory |
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| 15:00-16:30, Paper WedBT3.1 | Add to My Program |
| Reliability Characterization of Titanium-Doped Indium Oxide AOS FETs for AI-Enabled Autonomous System Electronics |
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| Weaver, David | University of Dayton |
| Kan, Hao-Wen | University of Dayton |
| Whalen, Ryan | University of Dayton |
| Chakravarty, Swapnajit | University of Dayton |
Keywords: Wider Bandgap Semiconductors, Semiconductor Devices, Microfabrication
Abstract: The deployment of artificial intelligence and autonomous systems in aerospace and defense applications imposes stringent reliability requirements on supporting microelectronic hardware. This work presents the fabrication, electrical characterization, and bias temperature instability (BTI) reliability evaluation of amorphous oxide semiconductor (AOS) field-effect transistors employing titanium-doped indium oxide (ITiO) as the channel material. Back-gated devices were fabricated using a Ti/Pd gate stack, atomic-layer-deposited Al2O3 dielectric, sputtered ITiO channel, and Ni/Au source/drain contacts. Characterization yielded a threshold voltage of -0.25~V, on/off ratio exceeding 5*10^6, and subthreshold swing of 155.8mV/decade. PBTI and NBTI stress testing revealed threshold voltage shifts within +-0.25V at room temperature, indicating dielectric charge trapping as the dominant instability mechanism. The implications of these instabilities are analyzed for AI-enabled autonomous platforms, where transistor-level drift propagates through analog front-ends, data converters, and inference engines to compromise sensor accuracy and mission reliability.
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| 15:00-16:30, Paper WedBT3.2 | Add to My Program |
| Temperature-Dependent Transport Characteristics of 2D MoS2 Channel FETs Grown Using Salt-Based Precursors |
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| Jones, Andrew | University of Cincinnati |
| Muha, Greg | University of Cincinnati |
| Gogi, Vamshi Kiran | University of Cincinnati |
| Ghosh, Sujoy | Oak Ridge National Lab |
| Jha, Rashmi | University of Cincinnati |
| Kyungnam, Kang | Oak Ridge National Lab |
| Xiao, Kai | Oak Ridge National Lab |
| Harris, Sumner | Oak Ridge National Lab |
Keywords: Semiconductor Devices, Microfabrication, Wider Bandgap Semiconductors
Abstract: 2D Transition Metal Dichalcogenides (TMDs), particularly MoS2, are promising candidates for sub-10 nm Gate All Around (GAA) CMOS FETs. Salt-assisted Chemical Vapor Deposition (CVD) enable lateral MoS2 growth at atmospheric pressure and low temperatures. This work analyzes salt-based precursor-driven CVD-grown MoS2 FETs at various temperatures. MoS2 was grown using Ammonium Molybdate salt, sulfurized at 750˚C, and transferred onto p-Si/SiO2 substrates. At room temperature, threshold voltage (VT ) ranged from -35V to -25V, with a peak drain current of 1.2 µA/µm. As temperature increased above 325K, VT shifted exponentially, and carrier mobility dropped significantly. At 400K, the gate lost channel control, though gate leakage current remained low. These results are compared with non-salt-based MoS2 growth to assess salt precursor effects.
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| 15:00-16:30, Paper WedBT3.3 | Add to My Program |
| Design and Analysis of a Capacitorless Full-Bridge DC--DC Converter Using a Solid-State Power Filter |
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| Kanakri, Haitham | Purdue University |
| Dos Santos Jr., Euzeli | Purdue University |
| Rizkalla, Maher | Purdue University |
Keywords: Brain machine interfaces BMI. and Autonomy in Medicine, SARs, Integrated Human Effects Models
Abstract: This paper presents the design and analysis of a capacitorless isolated full-bridge DC--DC converter in which the conventional LC output filter is replaced by a solid-state power filter (SSPF). The converter is first analyzed using switching-function modeling. The rectifier ripple is then characterized and used to derive the SSPF active ripple-cancellation principle. The proposed topology eliminates bulky electrolytic capacitors while preserving the basic full-bridge power-conversion mechanism. The resulting approach can improve converter lifetime, reliability, and power density.
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